1. Field of the Invention
The present invention relates to an electrostatic withstand voltage test method and apparatus that apply static electricity to a semiconductor integrated circuit and test for the occurrence of electrical breakdown.
2. Description of Related Art
As an electrostatic withstand voltage test method, the method disclosed in Unexamined Japanese Patent Publication No.2000-111596 (0015 through 0025, FIG. 1) is known, for example. An outline description of this method will be given below with reference to FIG. 1. FIG. 1 is a block diagram showing an exemplary configuration of a conventional electrostatic withstand voltage test apparatus 10.
In the aforementioned document, an electrostatic test apparatus is disclosed that, as shown in FIG. 1, is provided with a part holding section 12 holding an electrical part comprising a predetermined electrical circuit (product under test) 11, a discharge section (discharge gun) 13 that is located opposite this electrical part (product under test) 11 held in part holding section 12 and that is discharged by applying a high voltage, and a testing section 14 that tests whether or not the electrical circuitry of electrical part (product under test) 11 after a discharge is normal, and is configured so that a test of whether or not the electrical circuitry of electrical part (product under test) 11 after a discharge is normal is performed by testing section 14 after static electricity from discharge section (discharge gun) 13 is applied to electrical part (product under test) 11 while electrical part (product under test) 11 is held in part holding section 12; and wherein a power supply (direct current power supply) 15 that supplies electric power to electrical part (product under test) 11 held in part holding section 12 is provided upstream of part holding section 12, a power supply side switch member 16 is located between this power supply (direct current power supply) 15 and electrical part (product under test) 11, and a testing section side switch member 17 is located between testing section 14 and electrical part (product under test) 11, and a control section 18 is provided that controls driving of discharge section (discharge gun) 13 and testing by testing section 14.
Also, a conventional technique relating to a contactless pin leakage current test enabled input/output circuit is shown in Unexamined Japanese Patent Publication No. HEI 10-123212 (FIG. 1).
However, with the electrostatic withstand voltage test method disclosed in Unexamined Japanese Patent Publication No. 2000-111596, whether or not an electrical circuit is normal is determined by testing the operating state of a semiconductor integrated circuit after discharge of static electricity, but since there may be cases where electrostatic breakdown of some kind has occurred even though operation is normal, it is not possible to detect the occurrence of such minor electrostatic breakdown with this disclosed method. As the occurrence of minor electrostatic breakdown appears in the form of leakage current, it leads to increased current dissipation and can be a cause of heat generation. Thus, it is not possible to conduct semiconductor integrated circuit testing adequately with the electrostatic withstand voltage test method disclosed in Unexamined Japanese Patent Publication No.2000-111596.